The present invention relates to the field of ultrasound information processing systems. In particular, the present invention relates to an architecture for a low-cost, flexible, and scalable ultrasound information processing system capable of performing computationally intensive image processing algorithms in real time on ultrasound data.
Ultrasound imaging systems are advantageous for use in medical diagnosis as they are non-invasive, easy to use, and do not subject patients to the dangers of electromagnetic radiation. Instead of electromagnetic radiation, an ultrasound imaging system transmits sound waves of very high frequency (e.g., 2 MHz to 10 MHz) into the patient and processes echoes reflected from structures in the patient""s body to form two dimensional or three dimensional images. Many ultrasound information processing algorithms are known in the art, e.g., echo mode (xe2x80x9cB modexe2x80x9d) processing algorithms, motion mode (xe2x80x9cM modexe2x80x9d) processing algorithms, Doppler shift echo processing algorithms, color flow mode processing algorithms, and others.
In the design and development of an ultrasound information processing architecture, there have historically been tradeoffs among features directed to high data throughput (to allow for real-time image display image), flexibility (to accommodate various ultrasound clinical applications), scalability (for adapting a given ultrasound hardware architectures to differing field capacity requirements), and low cost of manufacture and maintenance. Generally speaking, the prior art ultrasound hardware architectures directed to higher data throughputs have had shortcomings in the areas of flexibility, scalability, and cost, while other prior art architectures directed to increased flexibility have had shortcomings in real-time data throughput and scalability.
FIG. 1 shows a block diagram of a conventional ultrasound information processing system 100 similar to a system disclosed in U.S. Pat. No. 5,492,125, xe2x80x9cUltrasound Signal Processing Apparatus,xe2x80x9d the contents of which are hereby incorporated by reference into the present disclosure. Ultrasound information processing system 100 comprises a system controller 102 for receiving and displaying user control information via a user interface 104. During operation, system control signals are output to an ultrasound front end comprising a transducer 106, a transmitter 108, and a beam-former 110. Transmitter 108 generates output signals to transducer 106 to define aperture, apodization, focus and steering of acoustic ultrasound signals into the target subject. Reflected signals from the subject being imaged are sensed by transducer 106 and captured as a patterned beam by beam-former 110.
In the system of FIG. 1, the captured signals are sent to a back end signal processing subsystem 112 in the form of digital echo signals, flow signals and/or Doppler signals according to various modes of operation. For purposes of the present disclosure, the captured signals are referred to herein as digital samples, it being understood that the physical significance of the digital samples will vary according to the mode of operation. The function of the back end signal processing subsystem is to process the digital samples and generate image data for output device 114.
FIG. 2 shows a diagram of a representative frame 200 of an ultrasound target with, respect to a transducer 202 for more particularly describing the digital samples being processed by the back end signal processing subsystem 112. In the example of FIG. 2 the transducer 202, which corresponds generally to the transducer 106 of FIG. 1, is a convex probe transducer with a 90 degree span. As shown in FIG. 2, the frame 200 comprises a set of scan lines 204 and a set of zones 206. In a typical ultrasound application, there may be up to 256 scan lines, and for each scan line there may be up to 1024 digital samples corresponding to ultrasound beam reflections. Each digital sample is typically 8 to 32 bits depending on the particular application. The scan lines 204 may be identified by their sequential position or by an angular position with respect to the center line of the transducer 202. Importantly, it is to be understood that the dimensions, resolutions, and other parameters disclosed herein are presented by way of example only to more clearly describe the features and advantages of the preferred embodiments disclosed infra, and are not intended to limit the scope of the preferred embodiments.
As known in the art, the frame 200 may also be divided axially (i.e., depthwise) into zones 206 for applications such as multi-zone focusing. In multi-zone focusing, acoustic ultrasound pulses may be sent and received in gated time windows focused to a particular zone for greater resolution in that particular zone. The number of zones 206 may vary greatly, with typical numbers being between 4 and 20 zones.
FIG. 3 shows a diagram of a representative frame 300 of an ultrasound target with respect to a flat probe transducer 302. The frame 300 also comprises scan lines 304 and zones 306 similar to the scan lines 204 and zones 206 of FIG. 2, respectively, except that the scan lines 304 may be indexed by distance offset (e.g., in centimeters) instead of angular offsets as in FIG. 2.
A problem arises in practical ultrasound systems when real-time ultrasound imaging is required, due to the high throughput rate required in real-time ultrasound imaging. For real-time ultrasound imaging systems, based on the typical parameters recited above with respect to FIGS. 2 and 3, using a digital sample resolution of 24 bits per sample and a desired frame rate of approximately 60 frames per second, the data throughput rate for the back end signal processing subsystem 112 would need to be as great as (24)(1024)(256)(60)=368 Mbps to permit real-time results. However, as described in Zagzebski, Essentials of Ultrasound Physics (1996), the contents of which are hereby incorporated by reference into the present disclosure, unprocessed ultrasound images display a variety of undesirable characteristics such as speckle, blur, blockiness and other adverse artifacts. To reduce the undesirable characteristics, and also to obtain further useful information from the ultrasound data, it is desirable to perform a variety of image processing algorithms on the ultrasound data prior to display such as speckle reduction, histogram equalization, contrast limited adaptive histogram equalization, edge detection, boundary enhancement, 2-D graphics, 3-D volume visualization, tissue characterization, image segmentation, perfusion measurements, and other algorithms. Additionally, as shown in U.S. Pat. 5,885,218, the contents of which are hereby incorporated by reference into the present disclosure, new spatial signal processing algorithms are continually being introduced for obtaining further useful information from the ultrasound data. Accordingly, there is a need for an ultrasound processing hardware platform capable of performing complex signal processing algorithms on ultrasound data while also being capable of sustaining the above very high throughput rate for real-time imaging.
U.S. Pat. No. 5,492,125 (xe2x80x9cthe ""125 patentxe2x80x9d) is directed to the goal of an ultrasound signal processing apparatus having a back-end ultrasound processing subsystem that is more versatile and programmable. In contrast to prior systems presented therein containing multiple distinct special-purpose processor boards dedicated to a particular type of ultrasound processing (e.g., one processor board for Doppler processing, a different board for B-mode processing, etc.), the ""125 patent discloses the use of a common pool of programmable multiprocessors such as multimedia video processors. However, in the ""125 patent, the programmable multiprocessors access a shared memory through a crossbar switch. Although the apparatus of the ""125 patent is adaptable to different image processing algorithms through a reprogramming of the multiprocessors, the crossbar switch introduces a bottleneck as the data rate is increased or where the input samples are presented in a random sequence, which hampers real-time ability when complex spatial image processing algorithms are needed. When a bottleneck is introduced, much of the processing capacity of the programmable multiprocessors goes unused. Because a large portion of the cost of any ultrasound information processing system usually lies in the xe2x80x9cnumber-crunchingxe2x80x9d hardware such as the programmable multiprocessors, a cost-performance inefficiency results where this expensive hardware is either under-used due to upstream bottlenecks in the system or is inefficiently used to rearrange to the order of the digital samples prior to performing image processing operations on the data.
U.S. Pat. No. 5,709,209 (xe2x80x9cthe ""209 patentxe2x80x9d), supra, is directed to the goal of higher throughput in a back-end ultrasound processing subsystem for real-time imaging in the various modes of ultrasound operations. The ""209 patent discloses an embodiment employing a multiple digital signal processor (digital signal processor) approach with shared memory and a crossbar switch similar to the disclosure of the ""125 patent and having similar limitations. The ""209 patent also discloses an embodiment in which a plurality of identical processor boards are configured to receive data from a input bus in a xe2x80x9cround-robinxe2x80x9d approach, process the data, and output the results on an output bus separate from the input bus. However, the architecture of the latter ""209 patent embodiment is deficient in a way which makes it less practical for real-world real-time ultrasound processing. As known in the art, scan lines from known transducer/beamformers are usually presented in a random sequence, and not in a sequential fashion by line number, to reduce extraneous reflections and clutter while still keeping up the frame rate. However, a xe2x80x9cround-robinxe2x80x9d approach of data stream distribution among the processor boards necessarily presupposes the arrival of scan line data in a sequential manner. Accordingly, the round-robin approach as disclosed in the ""209 patent is not adapted for real-time processing of the ultrasound data in practical environments in which scan lines arrive at very high data rates in random sequence from the front end components of the ultrasound system.
Accordingly, it would be desirable to provide an ultrasound information processing system capable of performing complex spatial image processing algorithms on real-time ultrasound data streams.
It would be further desirable to provide an ultrasound information processing system that is flexible and readily adaptable to various ultrasound clinical applications.
It would be still further desirable to provide an ultrasound information processing system that is scalable, for adapting the system to different differing capacity requirements and budgets, and for allowing easy upgrades of an existing system to more powerful configurations, with the speed of the overall system being limited by the raw processing capacity of its image processors, rather than by bottlenecks formed by the hardware that feeds the data to the image processors.
It would be still further desirable to provide an ultrasound information processing system that is capable of redundancy, such that operation can continue if a key processing component fails in critical environments.
It would be still further desirable to provide an ultrasound information processing architecture that can be built at low cost, wherein key ultrasound processing components can be implemented using commercial off the shelf hardware.
It would be still further desirable to provide a real-time, flexible, upgradable, adaptable, robust, and low-cost ultrasound information processor that is capable of implementing complex spatial signal processing algorithms in real time on scan line data that is presented in random order from front end ultrasound components.
In accordance with a preferred embodiment, an ultrasound information processing system is provided in which ultrasound image data is packetized into ultrasound information packets and routed to one or more of a plurality of processors for performing image processing operations on the ultrasound image data, the ultrasound information packets being routed according to entries in a host-programmable routing table. A common distribution bus is coupled between packetizing circuitry and dedicated input buffers corresponding to each processor for distributing the ultrasound information packets. A common output bus is used to transfer processed image data from the processors to an output device. Advantageously, the ultrasound information processing system throughput is high enough to accommodate real-time image processing operations, while the system is also flexible and can be readily upgraded by coupling additional processors to the common distribution bus and the common output bus and by reprogramming the routing table to include the additional processors as destinations for the ultrasound information packets.
In a preferred embodiment, the ultrasound information processing system includes packetizing circuitry for receiving ultrasound data derived from an ultrasound transducer and for organizing the ultrasound data into ultrasound information packets. The ultrasound data comprises digital samples corresponding to locations in an ultrasound frame, the ultrasound frame comprising a plurality of lines. The ultrasound information packets comprise location information including a line number and a payload comprising the digital samples corresponding the location information. The ultrasound information processing system includes a plurality of processors for performing image processing operations on the ultrasound data, and a routing table for storing routing data that associates each ultrasound information packet with a subset of the processors according to the location information in that ultrasound information packet. Control circuitry routes each ultrasound information packet to its associated subset of processors according to the routing data, and an output bus transfers processed image data from the processors to an output device.
Also in a preferred embodiment, the control, circuitry routes each ultrasound information packet to its associated subset of processors by instructing the input buffers associated with that subset of processors to read from the distribution bus when the ultrasound information packet is present on the distribution bus. Each input buffer comprises a ping-pong buffer having a first memory bank and a second memory bank, the ping-pong buffer being adapted to load image data into the first memory bank from the distribution bus while the processor associated with that input buffer is accessing and processing image data from the second memory bank, the ping-pong buffer being likewise adapted to load image data into the second memory bank from the distribution bus while the processor is accessing and processing image data from the first memory bank. Preferably, the processor accesses the image data from the input buffer memory banks in a direct memory access (DMA) fashion. When an ultrasound information packet arrives at the input, buffer, it is placed in proper order within the ultrasound frame as dictated by an intrabuffer destination address stored in the routing table. In this manner, the processors are efficiently used and valuable CPU cycles are not wasted waiting for a frame of data to load or by rearranging the digital samples prior to the image processing operations. A host computer is used for overall management and control, the host computer being coupled to the control circuitry, to each of the processors, and to the routing table by means of high-speed serial links. The host computer is used to download image processing programs into the processors and routing data into the routing table.
In another preferred embodiment, the disclosed ultrasound information processing system architecture may be adapted for increased field reliability of the overall system. In particular, a spare processor may be coupled to the common distribution bus and the common output bus, and the host computer is adapted to monitor the active processors for a failure condition. Upon detection of a failure of one of the active processors, the hot computer loads the spare processor with a copy of a program being run by the failing processor, and the host computer modifies the routing table to redirect ultrasound data packets from the failing processor to the spare processor.
The ability to hot-swap a failing processor with a replacement processor is one of several advantages of an ultrasound information system in accordance with the preferred embodiments, other advantages including: high data throughput through the use of multiple processors, separate distribution and output buses, and a pipelined data flow with DMA buffer access by the processor; increased flexibility and the ability to process randomly arriving line data through the use of a host-programmable routing table; and better cost-performance efficiency through the use of a scalable architecture.